{"id":38473,"date":"2025-03-27T14:28:37","date_gmt":"2025-03-27T18:28:37","guid":{"rendered":"https:\/\/its-cuthemedev1.carleton.ca\/engineering-design\/?page_id=38473"},"modified":"2025-03-27T14:28:38","modified_gmt":"2025-03-27T18:28:38","slug":"cmc-integrated-circuit-design-laboratory","status":"publish","type":"page","link":"https:\/\/carleton.ca\/engineering-design\/cmc-integrated-circuit-design-laboratory\/","title":{"rendered":"CMC Integrated Circuit Design Laboratory"},"content":{"rendered":"\n<section class=\"w-screen px-6 cu-section cu-section--white ml-offset-center md:px-8 lg:px-14\">\n    <div class=\"space-y-6 cu-max-w-child-max  md:space-y-10 cu-prose-first-last\">\n\n        \n                    \n                    \n            \n    <div class=\"cu-wideimage relative flex items-center justify-center mx-auto px-8 overflow-hidden md:px-16 rounded-xl not-prose  my-6 md:my-12 first:mt-0 bg-opacity-50 bg-cover bg-cu-black-50 py-24 md:py-28 lg:py-36 xl:py-48\" style=\"background-image: url(https:\/\/carleton.ca\/engineering-design\/wp-content\/uploads\/sites\/63\/integrated-circuit_1600x700_acf_cropped.jpeg); background-position: 50% 50%;\">\n\n                    <div class=\"absolute top-0 w-full h-screen\" style=\"background-color:rgba(0,0,0,0.600);\"><\/div>\n        \n        <div class=\"relative z-[2] max-w-4xl w-full flex flex-col items-center gap-2 cu-wideimage-image cu-zero-first-last\">\n            <header class=\"mx-auto mb-6 text-center text-white cu-pageheader cu-component-updated cu-pageheader--center md:mb-12\">\n\n                                    <h1 class=\"cu-prose-first-last font-semibold mb-2 text-3xl md:text-4xl lg:text-5xl lg:leading-[3.5rem] cu-pageheader--center text-center mx-auto after:left-px\">\n                        CMC Integrated Circuit Design Laboratory\n                    <\/h1>\n                \n                            <\/header>\n        <\/div>\n\n            <\/div>\n\n    \n\n    <\/div>\n<\/section>\n\n\n\n<p>The CMC Integrated Circuit Design Laboratory has the capability for design, optimization and layout of analog ICs, mixed-signal and digital ICs, radio frequency\/ microwave ICs, monolithic microwave ICs, electro-optic and photonic devices.<\/p>\n\n\n\n<p>Researchers work with some of the latest Sun workstations capable of computationally intensive CAD simulations.A full range of industry standard IC simulation software is available, running HP ADS, Cadence Design Systems, Matlab, HSPICE, Spectre, Sonnet and HFSS. Software for simulation of photonic devices includes OptiBPM, OptiFDTD, FEMLAB, and APSS. Cadence\u2019s Virtuoso is available for IC layout prior to fabrication of designs.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The CMC Integrated Circuit Design Laboratory has the capability for design, optimization and layout of analog ICs, mixed-signal and digital ICs, radio frequency\/ microwave ICs, monolithic microwave ICs, electro-optic and photonic devices. Researchers work with some of the latest Sun workstations capable of computationally intensive CAD simulations.A full range of industry standard IC simulation software [&hellip;]<\/p>\n","protected":false},"author":5,"featured_media":15414,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"_cu_dining_location_slug":"","footnotes":"","_links_to":"","_links_to_target":""},"cu_page_type":[51],"class_list":["post-38473","page","type-page","status-publish","has-post-thumbnail","hentry","cu_page_type-labs-and-facilities"],"acf":{"cu_post_thumbnail":""},"_links":{"self":[{"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/pages\/38473","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/comments?post=38473"}],"version-history":[{"count":1,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/pages\/38473\/revisions"}],"predecessor-version":[{"id":38474,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/pages\/38473\/revisions\/38474"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/media\/15414"}],"wp:attachment":[{"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/media?parent=38473"}],"wp:term":[{"taxonomy":"cu_page_type","embeddable":true,"href":"https:\/\/carleton.ca\/engineering-design\/wp-json\/wp\/v2\/cu_page_type?post=38473"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}