We host an industry seminar by Luc Romain, Principal Software Development Engineer at Siemens Digital Industries Software.
Luc will present “Introduction to Design-For-Test (DFT) and Memory Self-Repair”, offering an overview of modern structural test methodologies used in advanced SoC and ASIC development.
Date: Tuesday, March 3
Time: 7:00 PM – 8:30 PM
Location: ME (Mackenzie Building), Room 3235
About the Talk
As semiconductor systems continue to scale in complexity, Design-For-Test (DFT) has become a fundamental component of digital IC design. This seminar will introduce key concepts and industrial practices including:
- Motivation and fundamentals of DFT
- Scan insertion and Automatic Test Pattern Generation (ATPG)
- IEEE 1149.1 (JTAG) and IJTAG (1687) standards
- Logic BIST and Memory BIST architectures
- Fault models and test coverage
- Memory self-repair and redundancy techniques
- Overview of Siemens Tessent silicon lifecycle solutions