Industry Talk: Advanced FPGA Design Practices with Fidus Systems
April 22, 2026 | 4:30 PM – 6:00 PM | Nicol Building, Room 5010 (NI 5010)
We are pleased to host Dessislav Valkov, a senior FPGA engineer at Fidus Systems,
This technical talk draws from a curated set of advanced FPGA design topics reflecting real-world industry practices at one of Canada’s leading FPGA design services companies. Topics to be covered include FSM RTL design, FPGA simulation automation and best practices, SystemRDL for register design, Clock Domain Crossing (CDC), High-Level Synthesis (HLS), and typical SoC FPGA project structure and scripting workflows.
Dessislav is no stranger to our community — he joined us earlier in the term for the series’ opening drop-in session in February, where he engaged directly with students on their projects and research. This session marks his return in a more formal speaking capacity and brings the series to a strong technical close.
This event is the fifth of a Winter 2026 collaboration with Fidus Systems, which has brought experienced engineers from industry to campus across a series of drop-in sessions and seminars. The series has engaged students from Depertment of Electronics resulting in mentorship opportunities, project feedback, and graduate student internship referrals.