Research

As embedded systems are being massively deployed in the automotive industry, intelligent healthcare, Internet-of-Things (IoT) and smart infrastructure, developing security-aware designs became a vital research area. These systems are not only highly-constrained design environments, but are also vulnerable to implementation attacks. Implementation attacks are practical attacks that target the underlying implementation of a cryptographic algorithm rather than its mathematical foundation. The power consumption, electromagnetic radiation, execution time and response to injected faults are side-channel outputs that can leak information about the internal secret key, an attack that is commonly called Side-Channel Analysis (SCA). SCA is a passive, noninvasive attack that can not be detected by the underlying system (other than fault injection, which is active) and can break an AES implementation after a single execution.  For instance, an adversary can apply SCA over a legitimate sensor or control unit that he owns in order to reveal the secret key used for communication. Then, he can put this sensor in a target system in order to cause physical damage.

LR-Keymill: a new crypto structures with inherent security against SCA

Attacking Block-Ciphers:

In the crypto community, it is widely acknowledged that any cryptographic scheme that is built with no special countermeasure against side-channel attacks (SCA) can be easily broken. Our new research challenges this intuition. Lets introduce LR-Keymill.

LR-Keymill, or Leakage Resilient Keymill, is an SCA-secured keystream generator. It accepts 128-bits of secret key and 128-bits of Initialization Vector (IV) to generate a pseudorandom binary output stream of any length. LR-Keymill consists of four NLFSRs where the feedback functions are connected together through a rotating cross-connect, as shown in the figure. The rotating cross-connect mixes the feedback functions, so that, the internal state of any register depends on the internal state of all the other register. More details about LR-Keymill can be found in these two papers, here and here.

LR-Keymill is secured against passive SCA attacks without incorporating any special SCA countermeasures. The reason for this claim is that (very briefly), for every secret key, there is a large set of other keys that generate the exact same power signature, mandating a post-attack search phase with large time-complexity. On average, the required time-complexity after an SCA attack against the LR-Keymill is 67.9 bits. This time-complexity exceeds the birthday-boundary of AES (64 bits), and is considered safe for practical applications.

More details and the security proofs can be found here and here.

Previous Work

Some of my previous research can be captured in this diagram:

Attacking Block-Ciphers:

• Power Attacks: We exploited the power consumption of a parallel AES core on SASEBO-GII, and the results were presented at ICCD’12. Also, we exploited the smallest implementation of Simon, and the results were presented at HOST’15.
• Electromagnetic Attacks: We expolited the electromagnetic leakage of an AES core on Nios-II processor. The results were presented at FPL’12.
• Fault Attacks: We proposed a new concept for mounting Differential Fault Attacks. This attack combines the principles of Differential Power Analysis with Fault Injection attacks. The results were presented at FDTC’14.
  This paper was cited 82 times and later lead to a $307K NSF project ‘FAME: Fault-attack Awareness using Microprocessor Enhancements’, Award Number: 1441710, PI: P. Schaumont.

Protecting Block-Ciphers:

• Hiding: We designed a set of balanced custom instructions to prevent the electromagnetic leakage of AES on Nios-II processor. The results were presented at FPL’12.
• Masking:
  1. We proposed a provably-secure masking scheme of the new NSA block cipher Simon. This design is the smallest SCA-secure block cipher to date. Results were presented in HOST’15 and IEEE-TC’17.
  2. We also proposed a provably-secure masking scheme of the other NSA block cipher Speck. This design was presented in CARDIS’16
  3. We proposed a new method to estimate the information leakage of an embedded system right from the software code. The results of this research were presented at DAC’14 and IEEE-TCAD. These papers were cited 62 times and later lead to a $500K NSF project ‘Secure by Construction: An Automated Approach to Comprehensive Side Channel Resistance’, Award Number: 1617203, PI: P. Schaumont.
• Leakage Resiliency: We proposed a framework for practical leakage resiliency, with two solutions for AES. The results were accepted at DIAC’13 and IEEE-TIFS.

Attacking Hashing Functions:

• Power Attacks: We were the first people to exploited Keccak, the new SHA-3 hashing standard running on both Microblaze processor and a 0.13mm ASIC chip. Results of this project were presented at HOST’13, and IWSEC’13.
  These papers were cited 58 times, and were part of a big $1,5M NIST project, “Environment for Fair and Comprehensive Performance Evaluation of Cryptographic Hardware and Software“.

Protecting Hashing Functions:

• Leakage Resiliency: We developed a lightweight secure core for all the keyed and unkeyed applications of SHA-3. Results of this project were presented at HOST’14.
  This paper was part of a $437K NSF project, ‘New Directions in Side Channel Attacks and Countermeasures,’ Award Number: 1115839.

MSc Research:

During the MSc degree, we proposed a reliable broadcasting protocol for life-safety messages in Vehicular Ad-Hoc Networks (VANETs). Results of this research were presented in ISSPIT’07 and VTC’08.

My MSc research was cited more than 99 times.