Hardware Oriented Evolutionary Spiking Neural Networks

With the increasing complexity of Artificial Neural Networks (ANNs), power and resource constraints have become critical considerations, particularly for embedded hardware with limited resources. Spiking Neural Networks (SNNs), as a nature-inspired neural model, offer a promising alternative by enabling simpler implementations that are both power and cost efficient.

However, SNNs face challenges in training and adaptation. Genetic algorithms (GAs), inspired by natural evolution, present an effective method for identifying optimal solutions to these challenges, offering advantages such as ease of implementation and greater control over network parameters.

This study focuses on trainings SNNs using genetic algorithms with an emphasis on constraining network parameters to reduce power consumption and computational costs. The trained networks are translated into GPGA-implementable designs, leveraging neuron models with optimized arithmetic and logical units. This approach yields power and logic efficient networks, making them highly suitable for compact and resource-constrained hardware applications.