TR-90: Iterative Decomposition of Digital Systems and Its Applications

Abstract

This report presents a new technique for synthesis of multiple­output combinational circuits as well as sequential circuits based on successive transformations of the given function table and on iterative decomposition. The resulting networks have a form of a cascade of combinational subcircuits (e.g. ROM’s, PLA’s or gate networks) or a time­varying sequential circuit. The former network may find applications in VLSI circuit design and in systolic arrays, whereas the later network in sequential controllers (including the microprocessor-based controllers) and as the processor in SIMD arrays and pipelined structures. The new method of synthesis gives a more general insight into a variety of implementations of combinational as well as sequential functions encountered in the logic design area.